## Friday, September 16, 2011

### Computer Architecture # 03 :Arithmetic : SIGNED MULTIPLICATION AND DIVISION (9)

3.3.3 SIGNED MULTIPLICATION AND DIVISION
If we apply the multiplication and division methods described in the previous sections to signed integers, then we will run into some trouble. Consider multiplying −1 by +1 using four-bit words, as shown in the left side of Figure 3-16.
The eight-bit equivalent of +15 is produced instead of −1. What went wrong is that the sign bit did not get extended to the left of the result. This is not a problem for a positive result because the high order bits default to 0, producing the correct sign bit 0.

## Saturday, September 10, 2011

### Computer Architecture # 03 :Arithmetic : UNSIGNED DIVISION (8)

3.3.2 UNSIGNED DIVISION
In longhand binary division, we must successively attempt to subtract the divisor from the dividend, using the fewest number of bits in the dividend as we can.
Figure 3-13 illustrates this point by showing that (11)2 does not “ﬁt” in 0 or 01, but does ﬁt in 011 as indicated by the pattern 001 that starts the quotient.
Computer-based division of binary integers can be handled similar to the way that binary integer multiplication is carried out, but with the complication that the only way to tell if the dividend does not “ﬁt” is to actually do the subtraction and test if the remainder is negative. If the remainder is negative then the subtraction must be “backed out” by adding the divisor back in, as described below.

### Computer Architecture # 03 :Arithmetic : UNSIGNED MULTIPLICATION (7)

3.3.1 UNSIGNED MULTIPLICATION
Multiplication of unsigned binary integers is handled similar to the way it is carried out by hand for decimal numbers. Figure 3-10 illustrates the multiplication process for two unsigned binary integers. Each bit of the multiplier determines whether or not the multiplicand, shifted left according to the position of the multiplier bit, is added into the product. When two unsigned n-bit numbers are
multiplied, the result can be as large as 2n bits. For the example shown in Figure 3-10, the multiplication of two four-bit operands results in an eight-bit product.

## Wednesday, September 7, 2011

### Computer Architecture # 03 :Arithmetic : FIXED POINT MULTIPLICATION AND DIVISION (6)

3.3 Fixed Point Multiplication and Division
Multiplication and division of ﬁxed point numbers can be accomplished with addition, subtraction, and shift operations. The sections that follow describe methods for performing multiplication and division of ﬁxed point numbers in both unsigned and signed forms using these basic operations. We will ﬁrst cover unsigned multiplication and division, and then we will cover signed multiplication and division.

### Computer Architecture # 03 : Arithmetic: ONE’S COMPLEMENT ADDITION AND SUBTRACTION (5)

3.2.3 ONE’S COMPLEMENT ADDITION AND SUBTRACTION
Although it is not heavily used in mainstream computing anymore, the one’s complement representation was used in early computers.
One’s complement addition is handled somewhat differently from two’s complement addition: the carry out of the leftmost position is not discarded, but is added back into the least signiﬁcant position of the integer portion as shown in  Figure 3-7.
This is known as an end-around carry

### Computer Architecture # 03 : Arithmetic: HARDWARE IMPLEMENTATION OF ADDERS AND SUBTRACTORS

3.2.2 HARDWARE IMPLEMENTATION OF ADDERS AND SUBTRACTORS
Up until now we have focused on algorithms for addition and subtraction. Now we will take a look at implementations of simple adders and subtractors.